//-----------------------------------------------
//    module name: 
//    author: Liang
//  
//    version: 1st version (2021-10-01)
//    description: 
//        
//
//
//-----------------------------------------------
`timescale 1ns / 1ps
module gpio_slot(
    input  wire        clk,
    input  wire        rstn,
    input  wire [`GPIO_NUM-1:0] io_pin_i,
    output wire [31:0] gpio_ctrl_o,
    output wire [31:0] gpio_data_o,

    output wire         outR         ,
    input  wire         inR          ,
    output wire [50:0]  data_to      ,
    input  wire [50:0]  data_from    ,
    output wire         inA          ,
    input  wire         outA
    );
    
    wire           we;
    wire [31:0]    addr_i;
    wire [31:0]    data_i;
    wire [31:0]    data_o;

    wire clk_perip_slot,clk_gpio_module;
`ifdef DC_ClKTREE 
    `CLKBUFF buf_clk_15 (.A(clk),.Z(clk_perip_slot));
    `CLKBUFF buf_clk_16 (.A(clk),.Z(clk_gpio_module));
`else
    assign  clk_perip_slot = clk;
    assign  clk_gpio_module = clk;
`endif
  
    
    perip_slot slot(

        .clk           (clk_perip_slot    ),
        .rstn          (rstn              ),
                                         
        .outR          (outR              ),
        .inR           (inR               ),
        .data_to       (data_to           ),
        .data_from     (data_from         ),
        .inA           (inA               ),
        .outA          (outA              ),
                        
        .we            (we                ),
        .addr_i        (addr_i            ),
        .data_i        (data_i            ),
        .data_o        (data_o            )
    
    );
    gpio_module gpio_module(
        .clk           (clk_gpio_module   ),
        .rstn          (rstn              ),


        .we_i          (we                ),
        .addr_i        (addr_i            ),
        .data_i        (data_i            ),
        .data_o        (data_o            ),
        .gpio_ctrl_o   (gpio_ctrl_o       ),
        .gpio_data_o   (gpio_data_o       ),
        .io_pin_i      (io_pin_i          )
    );
    
    
endmodule
